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AMD 将为 Versal RF 自适应 SoC 导入 UCIe 1.1 互连支持_我的网站

一 |     (ECNS) -- Trial operations for the Harbin-Yichun high-speed railway began on Thursday when a train departed Harbin Station in northeast China's Heilongjiang Province at 7:40 a.m. and arrived at Yichun West Station 2 hours and 2 minutes later.    The Harbin–Yichun high-speed railway is an extension of the Beijing–Harbin and Beijing–Hong Kong-Macao corridor in China's eight vertical and eight horizontal high-speed rail network. It is also the northernmost high-speed railway currently under construction in China.        The 318-kilometer line starts in Harbin, passes through Suihua City, and ends in Yichun City. It is designed for speeds of up to 250 kilometers per hour.    Once the railway opens, travel time between Harbin and Yichun will be cut from about seven hours to around two hours.    (By Gong Weiwei)                            。     8 月 26 日消息，AMD 官方当地时间 25 日宣布将为 Versal RF 自适应 SoC 导入 UCIe 1.1 芯粒互连规范支持。这也是首批支持 UCIe 1.1 的 Versal 自适应 SoC。Versal RF 自适应 SoC 集成了高分辨率射频数据转换器、DSP、AI 引擎、可编程逻辑，提供高达 80 TOPS 的异构 DSP 计算能力。其具备 4 个 UCIe-SP（标准封装）接口、2 个 UCIe-AP（先进封装）接口。

二 | 这些标准化通用接口允许 Versal RF 自适应 SoC 与针对特定工作负载优化的共封装芯片（注：如第三方 FEM、CPU、GPU、ASIC）直接通信，提供 Tbps 级别的封装内互连总带宽，同时节省大型 SoC 的构建成本和用时。AMD 预计部分 Versal 自适应 SoC 的量产版芯片将于 2027Q4 上市。

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